Memory Hierarchy Design – Part 3. Memory technology and optimizations, which examined innovations in main memory that offer improved system performance This installment, which examines architecture ...

Evaluation methodology/metrics and caveats, instruction set design, advanced pipelining, instruction level parallelism, prediction-based techniques, alternative architectures (VLIW, Vector and SIMD), ...

Understand how a memory hierarchy works and tradeoffs that affect performance, especially how a cache works, the principle of locality, what affects the performance, and how to design a cache system.

Virtual memory and virtual machines, which examined architecture support for protecting processes from each other via virtual memory and the role of virtual machines This installment, which puts it ...

Presentation at the 2025 International Symposium on Computer Architecture (ISCA) at Waseda University in Tokyo by Steven Woo and Wendy Elsasser from Rambus and Taeksang Song, Samsung Electronics.

MIT researchers have developed a technique that rethinks hardware data compression, freeing up more memory used by computers and mobile devices.